[TriEmbed] Novel approach for low power logic from Intel

[John Wettroth]

There are two general techniques under the heading of voltage scaling.  DVS or dynamic voltage scaling does this in kind of an open loop way- vary the voltage and clock with kind of lookup table.  AVS or adaptive voltage scaling is closed loop, they have a kind of a small model of the process on chip that they can play with V and F (like a ring oscillator driving a counter, etc.).  This was called CPE, critical path emulation.  We had a group at Maxim that was trying to do similar things in the analog/mixed signal domain.  Current is just CVF + leakage.  Leakage is generally small portion but at low frequencies becomes significant.  You can play substrate tricks to reduce leakage, then its just C, V and F.  You have more control of C than you’d think, you can turn off big blocks when not in use- V and F is what’s left.
 
Regards,
John M. Wettroth
E: jwet at mindspring.com
M: (919) 349-9875 
H:  (984) 329-5420
 
From: Peter Soper <pete at soper.us> 
Sent: Monday, August 28, 2023 8:37 PM
To: Mike Lisanke <mikelisanke at gmail.com>
Cc: John Wettroth <jwet at mindspring.com>; Triangle Embedded Interest Group <triembed at triembed.org>
Subject: Re: [TriEmbed] Novel approach for low power logic from Intel
 
The novelty to me was the frequency being varied across a 300X range as the PS voltage was varied across a 5X range on the fly. I'd heard of very low supply voltages but not the dynamism. 
Pete 
 
Aug 28, 2023 8:32:49 PM Mike Lisanke <mikelisanke at gmail.com <mailto:mikelisanke at gmail.com> >:
Good catch on date! 
I didn't understand because there's So Much Energy Harvest technology that running a chip on a solar cell (2 sq in?) seemed ridiculously easy to me.  
I didn't read much further into the article thinking there was a mistake Or something unique. I don't know what size chip can boot/work with Just RF harvest but there's many.  
 
On Mon, Aug 28, 2023 at 8:15 PM Peter Soper via TriEmbed <triembed at triembed.org <mailto:triembed at triembed.org> > wrote: 
Ugh. Sorry. 

Aug 28, 2023 5:23:42 PM John Wettroth <jwet at mindspring.com <mailto:jwet at mindspring.com> >: 

> Just noticed that the press release was from 2012- DOH!  Oh well. 
> 
> 
> Regards, 
> John M. Wettroth 
> E: jwet at mindspring.com <mailto:jwet at mindspring.com>  
> M: (919) 349-9875 
> H:  (984) 329-5420 
> 
> -----Original Message----- 
> From: TriEmbed <triembed-bounces at triembed.org <mailto:triembed-bounces at triembed.org> > On Behalf Of John Wettroth via 
> TriEmbed 
> Sent: Monday, August 28, 2023 4:49 PM 
> To: 'Pete soper' <pete at soper.us <mailto:pete at soper.us> >; 'Triangle Embedded Interest Group' 
> <triembed at triembed.org <mailto:triembed at triembed.org> > 
> Subject: Re: [TriEmbed] Novel approach for low power logic from Intel 
> 
> I'm surprised that Intel is claiming this as really novel.  The Claremont 
> Architecture mentioned was being talked about as the IA in 2012.  It grew out of 
> the Atom processors that ran in this near threshold/sub threshold region.  Lot 
> of companies have used techniques like this for decades.  Most digital stuff 
> that runs at these absurd low voltages is subthreshold or near.  The very low 
> power Microchip (nanoWatt XLP) parts use these techniques.  Intel's FINFET 
> operate below .7v already.  There was a startup called SuVolta that was based on 
> these techniques- it disappeared (acquired or folded?) about five years ago. 
> Freescale had some dynamic power stuff that played games with the "body" or 
> substrate connection to modulate threshold voltage.  It let them make parts that 
> operate in strong inversion at high speeds  with higher class A type leakage 
> currents but could downshift to a slower, low leakage mode by manipulating the 
> body voltage.  They could do this on the fly- don't know what happened to it- 
> good fodder for ISSC conferences of the day.  Press releases are written by 
> investor relations guys that don't have a firm handle on the  technology and 
> mainly into promotion.  Ironically, the old 40 or so nm process nodes were much 
> better in these respects.  I think 7 nm might have overshot the mark. 
> 
> Take Care- 
> 
> Regards, 
> John M. Wettroth 
> E: jwet at mindspring.com <mailto:jwet at mindspring.com>  
> M: (919) 349-9875 
> H:  (984) 329-5420 
> 
> Searchable email archive available at 
> https://www.mail-archive.com/triembed@triembed.org/ 
> 
> 
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-- 
Best regards,  Mike 
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