[TriEmbed] Power FETs Vol 25, Issue 27

[Shane Trent]

Brian,

I think we may have figured out why your 33k gate resistor did not work.
You want a very weak (high resistance) pull-down on the gate to ensure the
FET turns off when you remove the drive signal (and at power up). A 10k
pull-down would turn the FET off quickly but would require a much stronger
signal to turn the FET on. Without any pull-down resistor, enough charge
could accumulate on the gate to randomly turn on the FET or it could take a
long time, from seconds to minutes, for the FET to turn off once you remove
the drive signal.

As, someone mentioned earlier on this thread, the pull-down resistor and
the I/O pin resistor form a voltage divider. So if you have a 10k pull-down
and a 33k I/O resistor between the pin and the gate, then the max voltage
on gate is 10k/(10k +33k) * Vout.  So for a 3.3V logic output your gate
voltage would have been around 0.77V so the FET would not have been close
to turning on.  With a 3.3k I/O resistor the voltage would have been around
2.5V, which is still not enough to cause the FET to conduct very well.

Shane

On Thu, Jun 18, 2015 at 4:13 PM, Grawburg <grawburg at myglnc.com> wrote:

> BTW, why such a large pull-down resistor? I was already using a 10k.
>
> Brian
>
> ------------------------------
> Subject: Re: [TriEmbed] Power FETs Vol 25, Issue 27
>
> Well, I'm not sure what I did wrong originally, but I just tried a 3.3k
> that I had on the table...it worked just fine.
> I also checked my resistor supply and I had a 100k so I put it between G-S.
> Now I have to rephotograph the breadboard! :-)
>
>
>


-- 
A blog about some of my projects.  http://fettricks.blogspot.com/
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