[TriEmbed] Fwd: LIVE Events: Innovators Day Webinar Series — Your Guide to What’s Next in FPGA Innovation

[Mike Lisanke]

Just to follow up on Pete's trigger of conversations of early computing and
how we used much simpler tricks (like Addition tables) in computing
(creating ALUs is artwork; and listen if you haven't to Risc-V ISA talks).
so some might be interested in many of the talks (I can't really keep up
with but want to). Here's just one example; 1st I saw after Pete's note
about FPGA.

---------- Forwarded message ---------
From: Embedded Webinar <ecd-ecasts at osm.events>
Date: Fri, Dec 19, 2025 at 10:07 AM
Subject: LIVE Events: Innovators Day Webinar Series — Your Guide to What’s
Next in FPGA Innovation
To: <mike.lisanke at 1network4everything.com>


Innovators Day Webinar Series:

*Your Guide to What’s Next in FPGA Innovation*
<https://go.embeddedcomputing.com/e/1039643/-page-utm-bmcr-source-OSMemail/48ptq/536262600/h/8kY_lwJJdXmz321SohbBBaExpD9_uvWlb6QWfM--8Ww>
[image: Header]


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Explore the sessions from Innovators Day 2025, as one-hour bits, and later
on demand; created for engineers, architects, developers, and technical
decision makers building next-generation systems.

Discover new techniques, tools, and architectures that are transforming how
teams design with FPGAs. Watch keynotes and partner demos and speak with an
expert that share practical ways to accelerate development, improve
performance, and solve real-world challenges.

Featuring insights from Altera experts and ecosystem partners, each session
delivers actionable guidance that helps you move faster and innovate with
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-- 
Best regards,  Mike
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