[TriEmbed] Novel approach for low power logic from Intel

[John Wettroth]

Just noticed that the press release was from 2012- DOH!  Oh well.


Regards,
John M. Wettroth
E: jwet at mindspring.com
M: (919) 349-9875 
H:  (984) 329-5420

-----Original Message-----
From: TriEmbed <triembed-bounces at triembed.org> On Behalf Of John Wettroth via
TriEmbed
Sent: Monday, August 28, 2023 4:49 PM
To: 'Pete soper' <pete at soper.us>; 'Triangle Embedded Interest Group'
<triembed at triembed.org>
Subject: Re: [TriEmbed] Novel approach for low power logic from Intel

I'm surprised that Intel is claiming this as really novel.  The Claremont
Architecture mentioned was being talked about as the IA in 2012.  It grew out of
the Atom processors that ran in this near threshold/sub threshold region.  Lot
of companies have used techniques like this for decades.  Most digital stuff
that runs at these absurd low voltages is subthreshold or near.  The very low
power Microchip (nanoWatt XLP) parts use these techniques.  Intel's FINFET
operate below .7v already.  There was a startup called SuVolta that was based on
these techniques- it disappeared (acquired or folded?) about five years ago.
Freescale had some dynamic power stuff that played games with the "body" or
substrate connection to modulate threshold voltage.  It let them make parts that
operate in strong inversion at high speeds  with higher class A type leakage
currents but could downshift to a slower, low leakage mode by manipulating the
body voltage.  They could do this on the fly- don't know what happened to it-
good fodder for ISSC conferences of the day.  Press releases are written by
investor relations guys that don't have a firm handle on the  technology and
mainly into promotion.  Ironically, the old 40 or so nm process nodes were much
better in these respects.  I think 7 nm might have overshot the mark.

Take Care-

Regards,
John M. Wettroth
E: jwet at mindspring.com
M: (919) 349-9875 
H:  (984) 329-5420

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